Library for model-based design of image processing algorithms on FPGAs

Authors

  • Luis Manuel Garcés-Socarrás Higher Polytechnic Institute José Antonio Echeverría https://orcid.org/0000-0002-4164-3673
  • Santiago Sánchez-Solano Institute of Microelectronics of Seville
  • Piedad Brox Jiménez Institute of Microelectronics of Seville https://orcid.org/0000-0003-1059-5338
  • Alejandro José Cabrera Sarmiento Higher Polytechnic Institute José Antonio Echeverría

DOI:

https://doi.org/10.17533/udea.redin.17039

Keywords:

fpga, xilinx system generato, MATLAB/Simulink, digital image processing

Abstract

This paper describes a library (XSGImgLib) that includes parameterizable blocks to implement low-level image processing tasks on FPGAs. A modelbased design technique provided by Xilinx System Generator (XSG) has been used to design the blocks, which implement point operation (binarization) and neighborhood operations (linear and non-linear filtering) in grayscale images. The blocks are parameterizable for input/output data precision, window size, normalization strategy, and implementation options (area versus speed optimization). The paper includes the implementation results obtained after fixing these options and exemplifies the combination of several blocks of the library to build a complete design for image segmentation purposes.

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Author Biographies

Luis Manuel Garcés-Socarrás, Higher Polytechnic Institute José Antonio Echeverría

Embedded Digital Systems Research Group, Automation Department.

Santiago Sánchez-Solano, Institute of Microelectronics of Seville

TIC180 Research Group.

Piedad Brox Jiménez, Institute of Microelectronics of Seville

TIC180 Research Group.

Alejandro José Cabrera Sarmiento, Higher Polytechnic Institute José Antonio Echeverría

Embedded Digital Systems Research Group, Automation Department.

References

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Published

2013-10-18

How to Cite

Garcés-Socarrás, L. M., Sánchez-Solano, S., Brox Jiménez, P., & Cabrera Sarmiento, A. J. (2013). Library for model-based design of image processing algorithms on FPGAs. Revista Facultad De Ingeniería Universidad De Antioquia, (68), 36–47. https://doi.org/10.17533/udea.redin.17039

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